1. Field of the Invention
The invention relates to television signal processing arrangements generally and particularly to those television signal processing arrangements utilizing timing signals.
2. Description of the Prior Art
In a television signal receiver, such as a television set, a video cassette recorder (VCR), a computer video input card and the like, synchronization using a phase lock loop (PLL) is often required. The PLL is used to adapt at least a portion of the timing circuitry within the video receiver according to synchronization (SYNC) pulses, such as vertical and/or horizontal SYNC PULSES within a received television or video signal.
A horizontal SYNCH pulse (HPLL) circuit may operate in one of a slow response loop mode or a fast response loop mode. The slow response loop mode is appropriate where a received video source signal has a relatively poor signal-to-noise ratio (SNR), such as provided by an antenna receiving a broadcast video signal. The fast response loop mode is appropriate where the received video source signal has a relatively good SNR ratio, such as from a video tape, video disk, computer video output or other source providing a relatively well conditioned video source signal.
Where a television receiver receives a video signal from a plurality of sources including both poor and good SNR, it becomes necessary to adjust the operating mode of the HPLL in response to the video source employed.
Therefore, it is seen to be desirable to provide a method and apparatus for detecting changes in video source material. More specifically, it is seen to be desirable to adapt the operation of a synchronizing phase lock loop in response to changes in video source material.
The subject invention concerns a signal processing method and apparatus in which a horizontal and/or vertical synchronizing signal related to a received video signal is monitored to determine if a relatively large change has occurred in the respective vertical and/or horizontal time period such that a change in video signal source may have occurred. Upon the detection of such a change, the operation of a phase lock loop (PLL) such as horizontal phase lock loop (HPLL) and/or vertical phase lock loop (VPLL) circuit is adapted as appropriate.
Apparatus, including a timer, for associating temporal information with each of a sequence of received synchronization pulses; a first differencer, for measuring temporal differences between successive synchronization pulses to determine respective synchronization pulse timing intervals; a second differencer, for measuring temporal differences between successive synchronization pulse timing intervals; and a comparator, for producing a control signal indicative of whether differences between successive synchronization pulse timing intervals exceed a threshold level.